The present invention relates generally to semiconductor fabrication and more specifically to semiconductor fabrication lithographic techniques.
As integrated circuit lithography approaches 193 nm wavelength, many process issues occur when applying the conventional single layer photoresist approach. One major issue is the limitation of depth of focus (DOF). Other issues that arise are: due to the weak structure of 193 nm wavelength photoresists (PR); striation of via/trench patterning after etching; contact bird""s beak; etc. Another issue, not directly related to the use of 193 nm lithography, is due to the chemical interaction of low dielectric constant (low-k) materials with the deep ultraviolet (DUV) PR itself known as PR poisoning.
The most promising strategy to extend optical lithography to 0.13 xcexcm and below is the top surface imaging (TSI) technology. Examples of TSI strategies are: multi-layer; silylated single layer; and silylated bi-layer. One common feature of these various TSI technology approaches is the use of plasma to dry develop the PR instead of the wet development in the conventional single layer approaches.
U.S. Pat. No. 6,103,448 to Kim et al. describes a dry develop process for photoresist and shows etching in an O2 plasma.
U.S. Pat. No. 5,286,607 to Brown describes a bi-layer resist process.
U.S. Pat. No. 6,080,678 to Yim describes a method for etching an anti-reflective coating (ARC) film.
U.S. Pat. No. 6,120,974 to Matsuo et al. describes a pattern forming material including a binary copolymer and a pattern forming method.
U.S. Pat. No. 5,922,516 to Yu et al. describes a bi-layer silylation process.
U.S. Pat. No. 5,700,628 to Moslehi describes a dry microlithography process.
Accordingly, it is an object of an embodiment of the present invention to provide an improved method of top surface imaging (TSI) lithography.
Other objects will appear hereinafter.
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a structure having a lower layer formed thereover is provided. An upper silicon-containing photoresist layer is formed upon the lower layer. The upper silicon-containing photoresist layer is selectively exposed to form upper silicon-containing photoresist layer exposed portions. The upper silicon-containing photoresist layer exposed portions and the portions of the lower layer below the upper silicon-containing photoresist layer exposed portions are removed using an O2-free N2/H2 plasma etch.